xc2s200e-6pqg208c DataSheet
DATASHEET
xc2s200e-6pqg208c 描述
These features make the 4405x Series ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The 4405x Series is packaged in a 24-pin 300-mil SOJ and a a 24-pin TSOP (Type II) with JEDEC standard pinouts.
xc2s200e-6pqg208c 特点
The 10 Gbps HiGig Expansion port supports explicit priority, port trunking, and mirroring functions across switch elements. The HiGig port can be used to interconnect upto 32 XC2S200E-6PQG208Cs making it extremely useful for highly-scalable network switch applications.
xc2s200e-6pqg208c 应用
The CD4014B and CD4021b series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
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描述
询价
10241
11+
PARAMETER Reference Voltage Section Fb Voltage
13752
11+
The floating-point register file is made u
13848
Hardware Reset, active Low. Provides a hardware me
5208
A high on the MASTER RESET (MR) sets all the cont
14048
Addresses and chip enables are registered at risin
16717
The XC5200 Field-Programmable Gate Array Family i
15491
Wiper position programming defaults to midscale a
17695
The CS5381 uses a 5th-order, multi-bit delta-sigma
8886
The mounting area was reduced by mak- ing the tw
13759
The A-to-B enable (CEAB) input must be low in ord
17911
via an RF or an infrared transmission medium upo
4950
Note 2: The maximum power dissipation is dictated
4726
The deserializer stays in lock until it cannot de
8877
Output, Pin 14, is suitable for controlling a pow
3499
The challenge for an integrated clock-recovery cir
3275
Continuous Drain Current, VGS @ 10V Continuous D
17079
3.1 KSO0~7 These pins are direct output from the
11091
n Internal Start-up Bias Regulator n 3A Compound