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XC95216-10PQG160C

工厂型号: XC95216-10PQG160C
型号类别: 可编程逻辑 IC
厂商: XILINX
型号: XC95216-10PQG160C
批号:
数量: 11877
更新日期: 2011/09/20

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描述

特点

应用

XC95216-10PQG160C 描述

      Typical represents the average reading at 25C and VDD = 5 V.   Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper   positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic, except R-DNL of AD5252 1 kΩ   version at VDD = 2.7 V, IW = VDD/R for both VDD = 3 V or VDD = 5 V. 3INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. DNL   specification limits of 1 LSB maximum are guaranteed monotonic operating conditions. 4Resistor Terminals A, B, and W have no limitations on polarity with respect to each other. 5Guaranteed by design and not subject to production test. 6cmd 0 NOP should be activated after cmd 1 to minimize IDD_READ current consumption. 7PDISS is calculated from IDD VDD = 5 V. 8All dynamic characteristics use VDD = 5 V.

XC95216-10PQG160C 特点

     CIInput capacitance, SENSEVI = 0 V to VDD50pF † Typical values apply at TA = 25C. ‡ The lowest supply voltage at which RESET becomes active. The symbol Vres is not currently listed within EIA or JEDEC standards for  semiconductor symbology. Rise time of VDD 15 µs/V. NOTES: 2. All characteristics are measured with CT = 0.1 µF.  3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be connected near the supply terminals.

XC95216-10PQG160C 应用

    - CRAM version without internal data E2PROM. The CRAM device implements a vola- tile program memory which is programmed by means of an embedded ROMed bootloader which transfers the code from a remote software programming tool called FLIP through UART or USB interfaces.
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