XCS20-3TQG144C DataSheet
DATASHEET
XCS20-3TQG144C 描述
pin signalised an interrupt (logic 0). However, if the Mode 0 & 1 pins are at logic 0, the transceiver returns to the sleep condition when the wake up bus voltage signal is not present. When not in sleep mode all valid bus signals will be sent out on the RxD pin. RxD will be placed in the undriven or off state when in sleep mode .
XCS20-3TQG144C 特点
The XCS20-3TQG144C is a high performance hex inverter operating from a 2.3 V to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers. These LCX devices have open drain outputs which provide the ability to set output levels, or do active−HIGH AND or active−LOW OR functions. A VI specification of 5.5 V allows XCS20-3TQG144C inputs to be safely driven from 5.0 V devices.
XCS20-3TQG144C 应用
By using unequal-valued external resistors, the two 2-pole sections can create different frequency responses or gains. In addition, the two stages may be cascaded to create a single 4-pole filter with a programmable re- sponse. Capable of cutoff frequencies up to 10MHz, the XCS20-3TQG144C is ideal for antialiasing or channel filtering in high speed data communications systems. The XCS20-3TQG144C can also be used as a bandpass filter.