TL103WID DataSheet
DATASHEET
TL103WID 描述
Programmable LVDS amplitude (VOD) and LVDS offset volt- age (VOS) of the differential signals can be adjusted for better impedance matching for noise and EMI reduction. The low level LVDS swing mode and offset voltage can be con- trolled via I2C.
TL103WID 特点
Chip Enable, active Low. This input must be asserted to read data from or wri te data to the TL103WID. When Hi gh, the data bus i s tri -stated and the device is placed in the Standby mode. Output Enable, active Low . Asserted for read operations and negated for write operations. BYTE# determines whether a byte or a word is read during the read operation. W r ite E n a b le , a c tiv e L o w. C o ntro ls wri ti ng o f c o m m a nd s o r c o m m a nd sequences in order to program data or erase sectors of the memory array. A write operation takes place when WE# is asserted while CE# is Low and OE# is High. Hardw are Reset, active Low. Provides a hardware method of resetting the TL103WID to the read array state. When the device is reset, it immediately terminates any operation in progress. While RESET# is asserted, the device will be in the Standby mode. R e a d y /B u s y S ta tu s . Ind i c a te s whe the r a wri te o r e ra s e c o mma nd i s i n progress or has been completed. Remai ns Low whi le the devi ce i s acti vely programming data or erasing, and goes High when it is ready to read array data. 3-volt (nominal) pow er supply.
TL103WID 应用
Technical/Catalog InformationTL103WIDVendorTexas InstrumentsCategoryIntegrated Circuits (ICs) Packaging
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