NJW0302G DataSheet
DATASHEET
NJW0302G 描述
8-Bit Resolution 20 MHz Sampling Rate DNL = +1/2 LSB, INL = +1 LSB (typ) Internal S/H Function Single Supply: 5 V VIN DC Range: 0 V to VDD VREF DC Range: 1 V to VDD Low Power: 85 mW typ. (excluding reference) Latch-Up Free ESD Protection: 2000 V Minimum
NJW0302G 特点
The NJW0302G is programmed by executing the program command sequence. This will invoke the Em- bedded Program AlgorithmTM which is an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase AlgorithmTM which is an internal algorithm that automatically preprograms the array if it is not already programmed before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.
NJW0302G 应用
Technical/Catalog InformationNJW0302GVendorON SemiconductorCategoryDiscrete Semiconductor Products Transistor Type