MRFE6S9060NR1 DataSheet
DATASHEET
MRFE6S9060NR1 描述
Reset input to the decoded zero counter A logic 0 on this input resets a decoded zero counter. It will also reset the AIS output to 0 provided 3 or more zeros have been decoded in the preceding RESET AIS = 1 period or set AIS to 1 if less than 3 zeros have been decoded in the preceding RESET AIS = 1 period This may be used to indicate loss of timeslot zero. A logic 1 on this pin enables the decoded zero counter.
MRFE6S9060NR1 特点
The MRFE6S9060NR1ynix MRFE6S9060NR1 Series are 16Mx72bits ECC Synchronous DRAM Modules. The modules are composed of nine 16Mx8bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.
MRFE6S9060NR1 应用
Technical/Catalog InformationMRFE6S9060NR1VendorFreescale SemiconductorCategoryDiscrete Semiconductor Products Transistor Type